1. Field of the Invention
The present invention relates to a process for fabricating an avalanche photodiode, more particularly, it relates to a process for fabricating an avalanche photodiode made of compound semiconductors for detecting long-wavelength light, and to an avalanche photodiode obtained by that fabrication process.
2. Description of the Related Art
Silicon (Si) photodiodes are known which reach near 100% quantum efficiency at wavelengths of 0.8 to 0.9 .mu.m. However, the long-wavelength cutoff of silicon is 1.1 .mu.m, which makes it impossible to use Si photodiodes for fiber-optic communication with long-wavelength light, such as 1.3 .mu.m or 1.55 .mu.m. At the wavelength of 1.55 .mu.m, for example, optical fibers may have an extremely low transmission loss of, e.g., 0.2 dB/km, and in the 1.0 to 1.6 .mu.m region, germanium (Ge) photodiodes, III-V ternary photodiodes, and III-V quaternary photodiodes have shown high quantum efficiencies.
In long distance fiber-optic communication, the use of long-wavelength light with low transmission loss necessitates that the signal-to-noise (S/N) ratios of the photodetectors be as high as possible, but Ge photodiodes have a relatively low S/N ratio due to equal hole to electron ionization coefficients and high dark currents. In this regard, compound semiconductor photodiodes such as III-V ternary or quaternary photodiodes may have the desired high ionization coefficients and desired low dark current, thus giving a high S/N ratio.
Avalanche photodiodes are operated at high reverse-bias voltages where avalanche multiplication takes place. A process for fabricating a typical avalanche photodiode made of a compound semiconductor, e.g., indium gallium arsenide (InGaAs), comprises the steps of: (i) continuously growing, on an n.sup.+ -type substrate of, e.g., indium phosphide (InP), an n-type light absorption layer of, e.g., InGaAs, and an n-type electric-field modifying or first multiplication layer of, e.g., InP, (ii) selectively etching the periphery of the first multiplication layer, leaving the first multiplication layer in the form of a mesa, (iii) melting back the exposed surface of the mesa-etched first multiplication layer, (iv) growing an n.sup.- -type semiconductor layer of, e.g., InP, on the melted-back first multiplication layer, and (v) doping an impurity from the top surface of the n.sup.- -type layer to form a p.sup.+ -type impurity doped light receiving region extending into the n.sup.- -type semiconductor layer but not reaching the n-type first multiplication layer; the p.sup.+ -type doped region having a pattern that is larger than the top of the mesa portion. An n.sup.- -type second multiplication layer is defined between the p.sup.+ -type doped region and the n-type first multiplication layer. A p-type guard ring region may be formed by selectively doping an impurity into the n.sup.- -type layer along the periphery of the p.sup.+ -type doped region, the guard ring region existing in a portion external to the top surface of the mesa portion. A passivation layer, electrodes etc. are then formed.
The first multiplication layer is made into a mesa shape to increase the breakdown voltage at the periphery of the p.sup.+ -type doped region where light should not be received and to decrease the breakdown voltage in the central portion of the p.sup.+ -type doped region where light is to be received. The breakdown voltage of a p-n junction increases with the decrease in the dopant concentration of the n-type region if the p-type region has the same dopant concentration. Therefore, the deeper portion of the n.sup.- -type semiconductor layer surrounding the mesa portion of the first multiplication layer enables an increase in the breakdown voltage of the p-n junction near the periphery of the p.sup.+ -type doped region where light should not be received. On the other hand, since the mesa-shaped n-type first multiplication layer exists near the central portion of the p.sup.+ -type impurity doped region, the breakdown voltage decreases in the central portion of the p.sup.+ -type impurity doped region where light is to be received.
To form the above-mentioned structure comprising the first multiplication layer in the form of a mesa, liquid phase crystal growths have been carried out twice, but discontinuously. Namely, the first crystal growth is stopped after the n-type semiconductor layer is grown and selective etching is then effected to form the mesa shaped first multiplication layer, followed by the second crystal growth for forming the n.sup.- -type semiconductor layer. Melting back the exposed surface of the etched or mesa shaped first multiplication layer in a thickness of 0.5 .mu.m or more is carried out just before the second crystal growth procedure, to remove defects induced at the surface of the etched first multiplication layer and to ensure the continuity of the grown crystals in spite of the discontinuity of the crystal growth procedures.
Avalanche photodiodes fabricated in accordance with the above process, however, have a nonuniform distribution of avalanche multiplication in the active area or the light receiving area, thus decreasing the S/N ratio of the avalanche photodiodes.